5G 延迟和抖动对 5G-TSN 网络中 TAS 调度的影响：实证研究

Industrial Internet of Things (IIoT) enables tightly integrated Cyber-Physical Systems (CPSs), which are critical for manufacturing automation in modern Industry 4.0. These systems demand deterministic, low-latency communication to guarantee safe and predictable operation in dynamic industrial environments [ 1 ]. Among the most demanding IIoT applications are Connected Robotics and Autonomous Systems (CRAS), including Autonomous Mobile Robots (AMRs), drones, and intelligent agents. These systems rely on precise coordination between sensing, computing, and actuation, and are highly sensitive to communication delays and jitter [ 2 ].

To meet these demands, Time-Sensitive Networking (TSN) standards define mechanisms that enable deterministic communication over wired Ethernet infrastructures [ 3 ]. One of the key components of TSN is the IEEE 802.1Qbv Time-Aware Shaper (TAS), which operates at the output ports of TSN switches. TAS enforces scheduled access to the transmission medium by periodically opening and closing gates that control the egress of packets from different traffic queues. By precisely determining when each queue is allowed to transmit, TAS ensures bounded delay and low jitter for selected traffic classes. This deterministic behavior is essential to support time-critical IIoT applications that require guaranteed communication performance [ 4 ]. Nevertheless, TSN ’s reliance on wired infrastructure limits mobility and flexibility, especially in complex industrial settings.

To overcome these limitations, 5th Generation (5G) mobile networks offer mobility, flexibility, wide-area coverage, and ultra-Reliable and Low-Latency Communications (uRLLC) capabilities, which have sparked significant interest in integrating 5G with TSN for industrial scenarios [ 5 ]. In this paradigm, industrial end devices such as robots and production line equipment connect wirelessly to the network via the 5G system. The 5G network provides access to a wired TSN backbone composed of TSN switches connected to edge computing platforms hosting IIoT control functions. This integration aims to combine 5G mobility and coverage with TSN determinism. However, the stochastic nature of 5G, characterized by variable delay in the radio and core segments, disrupts the strict timing required by TAS. This variability challenges the achievement of End-to-End (E2E) deterministic communication.

To address these challenges, TAS configurations must be carefully adapted to maintain synchronized transmissions across TSN switches. In particular, these configurations must compensate for the delay variability introduced by the 5G system while avoiding excessive buffering, added latency, or bandwidth inefficiencies. Ensuring proper alignment of transmission windows is essential to preserve the deterministic guarantees required by time-sensitive IIoT applications.

Literature Review. The 5G - TSN integration has drawn substantial research interest. Prior works have explored architectures where 5G functions as a logical TSN switch and have proposed solutions for time synchronization and Quality of Service (QoS) mapping between domains. Simulation studies have also evaluated TAS scheduling and jitter mitigation; however, these typically rely on idealized wireless models. Although such studies have advanced the understanding of 5G - TSN integration, critical challenges remain in tuning TAS parameters to compensate for realistic 5G delay and jitter dynamics. In particular, there is a lack of experimental validation under commercial 5G conditions. For interested readers, a detailed literature review is provided in Section VII.

Contributions. This article analyzes the impact of 5G -induced delay and jitter on the operation of the IEEE 802.1Qbv TAS in an integrated 5G - TSN network, focusing on the configuration of TAS scheduling parameters to accommodate a delay-critical traffic flow. The main contributions are:

C1 We provide a detailed analysis of the delay components involved in the transmission of packets between adjacent TAS -enabled TSN switches interconnected via a 5G network. This analysis characterizes how 5G -induced delays and jitter interact with TAS parameters, and quantifies their impact on E2E latency performance. C2 Based on this analysis, we identify the conditions under which deterministic communication can be achieved in 5G - TSN networks. We thoroughly investigate the resulting scenarios arising from different TAS parameter configurations and provide general configuration guidelines to ensure deterministic behavior. C3 We implement an experimental testbed integrating a commercial private 5G network and TAS -enabled TSN switches, enabling real-world evaluation of TAS configurations under realistic conditions. The testbed is used to assess the impact of 5G delay and jitter on specific TAS settings under representative network scenarios.

We provide a detailed analysis of the delay components involved in the transmission of packets between adjacent TAS -enabled TSN switches interconnected via a 5G network. This analysis characterizes how 5G -induced delays and jitter interact with TAS parameters, and quantifies their impact on E2E latency performance.

Based on this analysis, we identify the conditions under which deterministic communication can be achieved in 5G - TSN networks. We thoroughly investigate the resulting scenarios arising from different TAS parameter configurations and provide general configuration guidelines to ensure deterministic behavior.

We implement an experimental testbed integrating a commercial private 5G network and TAS -enabled TSN switches, enabling real-world evaluation of TAS configurations under realistic conditions. The testbed is used to assess the impact of 5G delay and jitter on specific TAS settings under representative network scenarios.

This article builds upon our previous conference work [ 6 ], which presented an initial testbed-based study of TAS scheduling in integrated 5G - TSN environments. In this extended version, we provide a more comprehensive theoretical and experimental analysis of the impact of 5G -induced delay and jitter on TAS operation. We identify and characterize critical scenarios arising from different TAS parameter configurations. Furthermore, we derive general configuration guidelines and formally establish the conditions required to guarantee deterministic E2E performance in 5G - TSN networks.

Our results show that guaranteeing bounded latency and jitter requires configuring the TAS transmission window offset between TSN switches based on the maximum observed 5G delay, estimated using a high-percentile delay metric. While increasing this offset helps to absorb delay variability, it also increases E2E latency. Moreover, if the offset becomes excessively large, it may cause misalignment between the transmission windows of TSN switches, thereby violating the deterministic behavior. Additionally, to ensure that packets always arrive within their assigned transmission windows, the TAS cycle period should be greater than the sum of the peak-to-peak jitter introduced by 5G and the transmission window duration. Finally, we see how additional traffic flows with the same priority may also increase 5G delay and jitter. Similarly, if the 5G network lacks proper isolation between traffic types, flows with lower priority can contribute to latency and jitter degradation. Such cases require recalculating TAS parameters.

Paper Outline. The paper is organized as follows: Section II covers background on industrial 5G - TSN networks and TAS. Section III presents the system model. Section IV analyzes 5G delay and jitter impact on TAS. Section V describes the testbed and the experimental setup. Section VI reports performance results. Section VII reviews related work. Section VIII outlines the key conclusions and future work.

This section overviews 5G - TSN networks in Industry 4.0. First, we introduce the main network segments and key characteristics of industrial applications. Then, we discuss QoS traffic management and the TAS mechanism. Finally, we highlight time synchronization for deterministic communications.

As depicted in Fig. 1, three connectivity segments are defined in a 5G - TSN -based industrial network [ 5 ]:

• Edge/Cloud Room: Centralizes management tasks handled by the Manufacturing Execution System (MES), such as monitoring, data collection, and analytics. Control functions are traditionally performed by Programmable Logic Controllers (PLCs), which may run on dedicated hardware or general-purpose servers, i.e., virtualized PLCs (vPLCs). This layer may also include a network device that provides the TSN Grand Master (GM) clock reference, typically derived from Global Navigation Satellite System (GNSS) [ 7 ], for distribution across the network. • 5G System: According to 3rd Generation Partnership Project (3GPP) TS 23.501 (v19.0.0) [ 8 ], the 5G system integrates into the TSN network as one or more virtual TSN switches, with the User Plane Functions (UPFs) and User Equipments (UEs) acting as endpoints. The UE connects wirelessly to the next generation Node B (gNB). The TSN Translators, specifically the Network-side Translator (NW-TT) located in the UPF and the Device-side Translator (DS-TT) in the UE, support the integration between the TSN and 5G domains by adapting traffic formats and QoS information, and enabling the transport of synchronization information. • Production Lines: Each includes Field Devices (FDs) such as sensors and actuators, along with local PLCs for distributed control. FDs report operational data to centralized PLCs, enabling hierarchical decision-making. Each production line connects to a TSN Slave (SL) switch that receives clock signals from the TSN Master (MS) switch via the 5G system and redistributes synchronization to the FDs within this production line.

Edge/Cloud Room: Centralizes management tasks handled by the Manufacturing Execution System (MES), such as monitoring, data collection, and analytics. Control functions are traditionally performed by Programmable Logic Controllers (PLCs), which may run on dedicated hardware or general-purpose servers, i.e., virtualized PLCs (vPLCs). This layer may also include a network device that provides the TSN Grand Master (GM) clock reference, typically derived from Global Navigation Satellite System (GNSS) [ 7 ], for distribution across the network.

5G System: According to 3rd Generation Partnership Project (3GPP) TS 23.501 (v19.0.0) [ 8 ], the 5G system integrates into the TSN network as one or more virtual TSN switches, with the User Plane Functions (UPFs) and User Equipments (UEs) acting as endpoints. The UE connects wirelessly to the next generation Node B (gNB). The TSN Translators, specifically the Network-side Translator (NW-TT) located in the UPF and the Device-side Translator (DS-TT) in the UE, support the integration between the TSN and 5G domains by adapting traffic formats and QoS information, and enabling the transport of synchronization information.

Production Lines: Each includes Field Devices (FDs) such as sensors and actuators, along with local PLCs for distributed control. FDs report operational data to centralized PLCs, enabling hierarchical decision-making. Each production line connects to a TSN Slave (SL) switch that receives clock signals from the TSN Master (MS) switch via the 5G system and redistributes synchronization to the FDs within this production line.

Industrial network traffic is predominantly delay-sensitive, with E2E latency requirements ranging from hundreds of microseconds to few tens of milliseconds [ 9 ]. Although other traffic types exist, such as network control, mobile robotics, and video streams, TAS can be applied to Cyclic-Synchronous applications, which require highly predictable timing to ensure reliable communications [ 5, 10 ].

The Cyclic-Synchronous applications consist of periodic communication between devices operating on independent cycles, with synchronization enforced at intermediate network nodes rather than end devices. Each device samples and updates at its own rate, allowing for bounded jitter and some timing variation. Although the E2E packet transmission delay must remain within predictable bounds, occasional variation is tolerated. Thereby, jitter is constrained to the latency bound [ 10 ]. This traffic is commonly used in controller-to-I/O exchanges, periodic sensor polling, and updates to supervisory systems. Examples include PLC -to-actuator response commands, graphic updates to Supervisory Control and Data Acquisition (SCADA) systems, and routine diagnostic or historian data transfers.

In addition, another category of time-sensitive industrial applications coexists with Cyclic-Synchronous: the Isochronous. Although both of them require strict delay and jitter analysis in 5G - TSN networks, our work addresses general Cyclic-Synchronous applications and evaluates the feasibility of their scheduling, as the stringent requirements of Isochronous applications cannot currently be met, which significantly exceed the latency capabilities of existing 5G deployments [ 11 ].

Traffic prioritization in TSN networks relies on the 3-bit Priority Code Point (PCP) field defined in IEEE 802.1Q Virtual Local Area Network (VLAN) tags, allowing up to eight priority levels [ 3 ]. These levels enable differentiation according to QoS requirements: higher values (i.e., PCP 4–7) are typically assigned to critical traffic, while lower ones (i.e., PCP 0–3) serve less time-sensitive or best-effort data [ 5 ].

In 5G networks, QoS is managed for each flow by a QoS Flow ID (QFI) and associated with a standardized 5G QoS Identifier (5QI), as specified in 3GPP TS 23.501 [ 8 ]. Each 5QI defines key performance characteristics such as priority level, delay tolerance, and packet error rate, which determine the treatment of traffic throughout the 5G system [ 12 ].

While TSN enforces QoS through PCP -based prioritization, 5G employs 5QI -driven flow control to differentiate traffic. The mapping between TSN traffic classes and 5G QoS flows remains an active research topic, primarily due to the semantic differences between the PCP -based prioritization in TSN and the 5QI -based framework in 5G. As shown in [ 9 ], a feasible approach involves classifying Ethernet frames based on their PCP field at the UE and UPF, using packet filters to associate them with appropriate 5G QoS flows.

IEEE 802.1Qbv is a TSN standard that specifies the TAS mechanism, which enables time-aware scheduling of Layer 2 frames at the egress ports of TSN switches based on QoS requirements [ 13, 14, 15 ]. TAS utilizes the PCP field in the IEEE 802.1Q header to classify packets into one of eight First-In First-Out (FIFO) queues. At each egress port, these queues are prioritized to ensure that higher-priority traffic is transmitted before lower-priority traffic.

Each egress port is controlled by a Gate Control List (GCL), which defines a time-triggered transmission schedule divided into transmission windows governed by the clock reference. During each transmission window, one or more queues are permitted to transmit, depending on the binary state of their associated gates. Each queue has its own gate, and the GCL specifies the time intervals during which each gate is open or closed. When multiple gates are open, transmission order typically follows queue priority, although exact behavior may depend on the switch implementation.

TAS scheduling is organized around periodic network cycles that enable deterministic communication. A network cycle consists of a fixed-duration time interval which encompasses a full instance of a specific set of transmission windows defined by the GCL [ 16 ]. The duration of the network cycle is typically chosen to align with the application cycles involved, which are defined as the periods at which message exchanges occur. This alignment is commonly achieved by selecting the network cycle duration as the greatest common divisor of the involved application cycles. For more information on TAS see [ 4 ].

Time synchronization is essential in 5G - TSN networks to support the deterministic requirements of IIoT applications. In typical TSN architectures, a TSN MS switch distributes the GM clock via Precision Time Protocol (PTP) or generalized Precision Time Protocol (gPTP) messages to multiple TSN SL switches, each deployed along a different production line, as defined in Section II-A. Upon receiving these messages, each TSN SL switch estimates the time difference between its local clock and the reference clock of the TSN MS switch, known as the clock offset, and adjusts its local time accordingly [ 17 ].

According to the architecture defined in 3GPP TS 23.501 [ 8 ], TSN translators, specifically the NW-TT and DS-TT, enable propagation of the GM clock across the 5G system to the TSN domain, thus maintaining clock consistency across TSN switches interconnected via 5G (see Fig. 1). A widely adopted configuration for propagating synchronization over 5G is the Transparent Clock (TC) mode defined in IEEE 1588 [ 18, 19, 20 ], where synchronization messages are forwarded with the correctionField updated to reflect the residence time within each intermediate node, while original timestamps remain unchanged. Unlike Boundary Clock (BC) mode, where each node terminates and regenerates synchronization messages, TC mode preserves a single timing domain by accumulating residence times [ 21 ]. The NW-TT and DS-TT measure the residence time within the 5G system and include this delay in the forwarded messages with the correctionField. This operation complies with IEEE 1588-2019 and enables accurate clock correction at the TSN endpoint. For more information see [ 17, 21, 18, 20, 19 ].

Discrepancies in the clocks of different devices within the 5G - TSN network may occur, preventing the devices from updating their clocks accurately. The 3GPP TS 22.104 [ 22 ] specifies that a maximum clock drift contribution of 900 ns must be guaranteed for 5G systems to enable time-critical industrial applications. In line with this, the work in [ 20 ] empirically quantizes a maximum peak-to-peak synchronization error of 500 ns, which is significantly below the requirement.

This section introduces the network and traffic models. We then describe the TAS model, followed by a description of the different sources of latency in the system. Table I provides a summary of key mathematical notations used throughout the paper.

Notation Conventions. We use calligraphic letters (e.g., 𝒳 \mathcal{X}) to denote sets. Lowercase letters (e.g., y y) represent random variables, while uppercase letters (e.g., Y Y) denote constant parameters. Binary variables are typeset in uppercase sans serif font (e.g., 𝖷 \mathsf{X}). Subscripts indicate that a parameter applies to specific elements of a given set; for example, z i, j z_{i,j} refers to the parameter z z corresponding to elements i ∈ ℐ i\in\mathcal{I} and j ∈ 𝒥 j\in\mathcal{J}. Superscripts provide descriptive annotations, e.g., z desc z^{\text{desc}} denotes the variable z z with descriptor ”desc”. In addition, f x ​ (⋅) f_{x}(\cdot) and F x ​ (⋅) F_{x}(\cdot) denote the Probability Density Function (PDF) and Cumulative Distribution Function (CDF) of the random variable x x, respectively. Finally, the letter Z ^ \hat{Z} denotes the statistical upper bound of F x ​ (⋅) F_{x}(\cdot).

We consider a set of network nodes denoted by ℐ \mathcal{I}, comprising: (i) two TSN switches, denoted as master switch MS and slave switch SL, respectively; (ii) two TSN translators, one being a network-side translator and denoted as NW-TT and the other being the device-side translator and denoted as DS-TT; (iii) a 5G UE denoted as UE; and (iv) a 5G gNB and an UPF, denoted by gNB and UPF, respectively. Each communication link is represented by ε \varepsilon, and the set of all such links is denoted by ℰ \mathcal{E}. A specific link between nodes i i and j j is denoted by ε i, j ∈ ℰ \varepsilon_{i,j}\in\mathcal{E}, where i, j ∈ ℐ i,j\in\mathcal{I}. The topology is defined by the sequential links: ℰ ≡ { ε MS, NW-TT, ε NW-TT, UPF, ε UPF, gNB, ε gNB, UE, ε UE, DS-TT, ε DS-TT, SL } \mathcal{E}\equiv\{\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{NW-TT}{{{}}NW-TT}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{NW-TT}{{{}}NW-TT}},\text{\lx@glossaries@gls@link{acronym}{UPF}{{{}}UPF}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{UPF}{{{}}UPF}},\text{\lx@glossaries@gls@link{acronym}{gNB}{{{}}gNB}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{gNB}{{{}}gNB}},\text{\lx@glossaries@gls@link{acronym}{UE}{{{}}UE}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{UE}{{{}}UE}},\text{\lx@glossaries@gls@link{acronym}{DS-TT}{{{}}DS-TT}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{DS-TT}{{{}}DS-TT}},\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}\}. We define the subset of nodes corresponding to the 5G system as ℐ 5G ≡ { UE, gNB, UPF, NW-TT, DS-TT } \mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}\equiv\{\text{\lx@glossaries@gls@link{acronym}{UE}{{{}}UE}},\text{\lx@glossaries@gls@link{acronym}{gNB}{{{}}gNB}},\text{\lx@glossaries@gls@link{acronym}{UPF}{{{}}UPF}},\text{\lx@glossaries@gls@link{acronym}{NW-TT}{{{}}NW-TT}},\text{\lx@glossaries@gls@link{acronym}{DS-TT}{{{}}DS-TT}}\}. Similarly, the virtual 5G system link set ℰ 5G ⊂ ℰ \mathcal{E}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}\subset\mathcal{E} contains the subset of physical links that connect the nodes of the 5G system, i.e., ℰ 5G ≡ { ε NW-TT, UPF, ε UPF, gNB, ε gNB, UE, ε UE, DS-TT } \mathcal{E}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}\equiv\{\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{NW-TT}{{{}}NW-TT}},\text{\lx@glossaries@gls@link{acronym}{UPF}{{{}}UPF}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{UPF}{{{}}UPF}},\text{\lx@glossaries@gls@link{acronym}{gNB}{{{}}gNB}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{gNB}{{{}}gNB}},\text{\lx@glossaries@gls@link{acronym}{UE}{{{}}UE}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{UE}{{{}}UE}},\text{\lx@glossaries@gls@link{acronym}{DS-TT}{{{}}DS-TT}}}\}. Finally, we define the subset of TSN switches as ℐ TSN ⊂ ℐ \mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}\subset\mathcal{I}, i.e., ℐ TSN ≡ { MS, SL } \mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}\equiv\{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}\}, which are interconnected via the 5G system with the link set ℰ TSN ⊂ ℰ \mathcal{E}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}\subset\mathcal{E}, containing the subset of physical links to the 5G bridge bounds NW-TT and DS-TT, i.e., ℰ TSN ≡ { ε MS, NW-TT, ε DS-TT, SL } \mathcal{E}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}\equiv\{\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{NW-TT}{{{}}NW-TT}}},\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{DS-TT}{{{}}DS-TT},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}\}, respectively.

Let 𝒮 \mathcal{S} denote the set of traffic flows traversing the considered 5G - TSN network. Specifically, 𝒮 \mathcal{S} includes:

• A downlink Delay-Critical (DC) flow generated by a Cyclic-Synchronous application, as described in Section II-B. We assume a DC flow in downlink as a set of packets sharing a source at the Edge/Cloud Room, e.g., a PLC, and any of the devices in the same production line as the destination, e.g., actuators, which are typically served by a common switch, i.e., the SL switch. Each application cycle, of periodic duration T DC app T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, the PLC generates a batch of N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets of constant size L DC L_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, resulting in an average data rate R DC gen = N DC ⋅ L DC / T DC app R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}}~=~N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~\cdot~L_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}/T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, as a response delivered to all these actuators after processing the production state [ 23 ]. Additionally, packets must traverse the 5G - TSN network subject to an E2E delay constraint d DC E2E ≤ D DC d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{\lx@glossaries@gls@link{acronym}{E2E}{{{}}E2E}}}~\leq~D_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Assuming these packets belong to a single application, they share the same timing constraints between them. • A downlink Best-Effort (BE) flow composed of packets that do not require strict timing guarantees. We assume packets of constant size L BE L_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}} are generated at a constant data rate R BE gen R_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}^{\text{gen}}. • Uplink and downlink PTP flows are considered to support clock synchronization among TSN switches. The exchange of these messages, as defined by the PTP standard, occurs periodically, with an application cycle T PTP app T_{\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}^{\text{app}} significantly larger than T DC app T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, i.e., T PTP app ≫ T DC app T_{\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}^{\text{app}}\gg T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}.

A downlink Delay-Critical (DC) flow generated by a Cyclic-Synchronous application, as described in Section II-B. We assume a DC flow in downlink as a set of packets sharing a source at the Edge/Cloud Room, e.g., a PLC, and any of the devices in the same production line as the destination, e.g., actuators, which are typically served by a common switch, i.e., the SL switch. Each application cycle, of periodic duration T DC app T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, the PLC generates a batch of N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets of constant size L DC L_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, resulting in an average data rate R DC gen = N DC ⋅ L DC / T DC app R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}}~=~N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~\cdot~L_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}/T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, as a response delivered to all these actuators after processing the production state [ 23 ]. Additionally, packets must traverse the 5G - TSN network subject to an E2E delay constraint d DC E2E ≤ D DC d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{\lx@glossaries@gls@link{acronym}{E2E}{{{}}E2E}}}~\leq~D_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Assuming these packets belong to a single application, they share the same timing constraints between them.

A downlink Best-Effort (BE) flow composed of packets that do not require strict timing guarantees. We assume packets of constant size L BE L_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}} are generated at a constant data rate R BE gen R_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}^{\text{gen}}.

Uplink and downlink PTP flows are considered to support clock synchronization among TSN switches. The exchange of these messages, as defined by the PTP standard, occurs periodically, with an application cycle T PTP app T_{\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}^{\text{app}} significantly larger than T DC app T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, i.e., T PTP app ≫ T DC app T_{\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}^{\text{app}}\gg T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}.

PTP flows are assigned the highest priority, followed by DC and then BE flows, consistently across both the 5G and TSN domains. Accordingly, PTP and DC packets are assigned higher PCP values for TSN scheduling, and they are mapped to 5G QoS flows with lower 5QI indices, indicating stricter QoS treatment. BE packets are mapped to the lowest priority class with higher 5QI index.

At each TSN switch i ∈ ℐ TSN i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, each egress port is associated with a set 𝒬 i \mathcal{Q}_{i} containing up to eight output queues. We assume a one-to-one mapping between each queue q ∈ 𝒬 i q\in\mathcal{Q}_{i} and a traffic flow s ∈ 𝒮 s\in\mathcal{S}, allowing interchangeability of q q and s s throughout this paper. Furthermore, we assume the GCL enforces mutually exclusive gate openings among the eight queues per egress port, guaranteeing that only one queue is permitted to transmit at any given instant.

Accordingly, the GCL configuration for queue q ∈ 𝒬 i q\in\mathcal{Q}_{i} at switch i ∈ ℐ TSN i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} is formally expressed by Eq. (1). The binary variable 𝖦 i, q ​ (t) \mathsf{G}_{i,q}(t) indicates whether the gate is open (1) or closed (0). The gates operate periodically with period T i nc T_{i}^{\text{nc}}, referred to as the network cycle. In the network cycle n = 0 n=0, the gate opening and closing instants, T i, q open T_{i,q}^{\text{open}} and T i, q closed T_{i,q}^{\text{closed}}, define the transmission window duration W i, q = T i, q closed − T i, q open W_{i,q}=T_{i,q}^{\text{closed}}-T_{i,q}^{\text{open}}. 𝖦 i, q ​ (t) = { 1, n ​ T i nc + T i, q open < t ≤ n ​ T i nc + T i, q closed, ∀ n ∈ ℕ ∪ { 0 }. 0, otherwise. \mathsf{G}_{i,q}(t)=\begin{cases}1,&nT_{i}^{\text{nc}}+T_{i,q}^{\text{open}}<t\leq nT_{i}^{\text{nc}}+T_{i,q}^{\text{closed}},\\ &\;\forall n\in\mathbb{N}\cup\{0\}.\\ 0,&\text{otherwise}.\end{cases} (1)

The DC flow period T DC app T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}} typically ranges from several hundreds of microseconds up to a few tens of milliseconds, whereas PTP synchronization messages are generated approximately every T PTP app ≈ 1 ​ s T_{\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}^{\text{app}}\approx 1\,\text{s}. Given that condition T PTP app ≫ T DC app T_{\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}^{\text{app}}~\gg~T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, we consider the duration of the network cycle, T i nc = T DC app T_{i}^{\text{nc}}=T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}, ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, as the DC flow is the primary target of this work.

Each network cycle comprises three non-overlapping transmission windows (see Fig. 2): W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} for the DC traffic, W i, PTP W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}} for PTP synchronization messages and W i, BE W_{i,\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}} for BE traffic, followed by a fixed guard band T GB T^{\text{GB}} to avoid interference on DC traffic. Thus, T i nc = W i, DC + W i, PTP + W i, BE + T GB T_{i}^{\text{nc}}~=~W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~+~W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}~+~W_{i,\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}~+~T^{\text{GB}}, ∀ i ∈ ℐ TSN \forall~i~\in~\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}. We consider W i, PTP W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}} occupies a negligible fraction of T i nc T_{i}^{\text{nc}}, 100 to 1000 times smaller, due to the low frequency of synchronization messages, i.e., W i, PTP ≪ W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}\ll W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} and W i, PTP ≪ W i, BE W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}}\ll W_{i,\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}. Due to this and for ease of reading, W i, PTP W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}} is omitted in subsequent equations, while it is implicitly assumed to be scheduled immediately after W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. For further details on PTP planning, see [ 21 ].

Finally, at the MS, each batch of N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets belonging to the DC flow is assumed to be available at the start of every network cycle.

For each packet of flow s ∈ 𝒮 s\in\mathcal{S} traversing node i ∈ ℐ i\in\mathcal{I}, the total delay comprises five components: input queuing delay, processing delay, output queuing delay, transmission delay, and propagation delay. These can be seen in Fig. 3.

The input queuing delay d i, s que,in d_{i,s}^{\text{que,in}} is the interval between the arrival of a packet at node i i and the start of its processing. The processing delay d i, s proc d_{i,s}^{\text{proc}} corresponds to the time required by node i i to parse the packet header and determine the forwarding action. The output queuing delay d i, s que,out d_{i,s}^{\text{que,out}} refers to the delay from the end of processing at node i i until the packet is transmitted to the next hop.

The transmission delay d ε i, j, s tran d_{\varepsilon_{i,j},s}^{\text{tran}} corresponds to the time needed to serialize all bits of the packet over the link ε i, j ∈ ℰ \varepsilon_{i,j}\in\mathcal{E}. It depends on the packet size L s L_{s} and the link capacity r ε i, j r_{\varepsilon_{i,j}}, and is given by d ε i, j, s tran = L s / r ε i, j d_{\varepsilon_{i,j},s}^{\text{tran}}=L_{s}/r_{\varepsilon_{i,j}}. The propagation delay D ε i, j prop D_{\varepsilon_{i,j}}^{\text{prop}} is the time a signal takes to travel through link ε i, j ∈ ℰ \varepsilon_{i,j}\in\mathcal{E} and is assumed to be constant for any flow s ∈ 𝒮 s\in\mathcal{S} in that link in time.

In this section, we analyze how 5G impacts TAS scheduling performance. First, we define the E2E delay for a packet of an arbitrary flow and study how the 5G delay component impacts it. Then, we formalize the constraint for the transmission window of the DC flow in TSN switches. Next, we introduce the concept of offset between the network cycles of the MS and SL switches, and derive the conditions required to ensure deterministic communication. Finally, we analyze how this offset interacts with the 5G delay component, and evaluate how different TAS parameter configurations influence the scheduling performance across various scenarios.

The set of flows 𝒮 \mathcal{S} traverses a sequence of network nodes to reach their destination, as illustrated in Fig. 3. The E2E packet transmission delay d s E2E d_{s}^{\text{\lx@glossaries@gls@link{acronym}{E2E}{{{}}E2E}}} for the flow s ∈ 𝒮 s\in\mathcal{S} along this path is computed as the sum of delays at each network node plus the transmission delays on each link: d s E2E = ∑ i ∈ ℐ (d i, s que,in + d i, s proc + d i, s que,out) + ∑ e ∈ ℰ (d e, s tran + D e prop). d_{s}^{\text{\lx@glossaries@gls@link{acronym}{E2E}{{{}}E2E}}}\hskip-1.42271pt=\hskip-2.84544pt\sum_{i\in\mathcal{I}}\left(d_{i,s}^{\text{que,in}}\hskip-2.84544pt+\hskip-1.42271ptd_{i,s}^{\text{proc}}\hskip-1.42271pt+\hskip-1.42271ptd_{i,s}^{\text{que,out}}\right)\hskip-1.42271pt+\sum_{e\in\mathcal{E}}\left(d_{e,s}^{\text{tran}}\hskip-2.84544pt+\hskip-1.42271ptD_{e}^{\text{prop}}\right). (2) The 5G delay d s 5G d_{s}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}} is defined as the sum of node processing and queuing delays, plus link transmission in the 5G domain: d s 5G = ∑ j ∈ ℐ 5G (d j, s que,in + d j, s proc + d j, s que,out) + ∑ k ∈ ℰ 5G (d k, s tran + D k prop). d_{s}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}=\hskip-1.42271pt\sum_{j\in\mathcal{I^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}}}\hskip-2.84544pt\left(d_{j,s}^{\text{que,in}}\hskip-1.42271pt+\hskip-1.42271ptd_{j,s}^{\text{proc}}\hskip-1.42271pt+\hskip-1.42271ptd_{j,s}^{\text{que,out}}\right)\hskip-0.85355pt+\hskip-2.84544pt\sum_{k\in\mathcal{E^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}}}\hskip-2.84544pt\left(d_{k,s}^{\text{tran}}\hskip-1.42271pt+\hskip-1.42271ptD_{k}^{\text{prop}}\right). (3) To assess the impact of 5G in combination with the TAS scheduling, we consider the packet delay between the MS and SL output ports, d s MS, SL d_{s}^{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}, and compute it as follows: d s MS, SL = ∑ ε ⊂ ℰ TSN (d ε, s tran + D ε prop) + d s 5G + d SL, s que,in + d SL proc + d SL, s que,out. d_{s}^{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}=\hskip-2.84544pt\sum_{\varepsilon\subset\mathcal{E}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}}\hskip-5.69046pt\left(d_{\varepsilon,s}^{\text{tran}}\hskip 0.0pt+\hskip-1.42271ptD_{\varepsilon}^{\text{prop}}\hskip-2.84544pt\hskip 2.84544pt\right)+d_{s}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}+d_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},s}^{\text{que,in}}+d_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}^{\text{proc}}+d_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},s}^{\text{que,out}}\hskip-1.42271pt. (4) For convenience, we also consider the packet delay between the MS output port and the SL switch processing, d ~ s MS, SL \widetilde{d}_{s}^{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}, that is, excluding the SL output queuing delay, d SL, s que,out d_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},s}^{\text{que,out}}, as it is influenced by the TAS configuration: d ~ s MS, SL = ∑ ε ⊂ ℰ TSN (d ε, s tran + D ε prop) + d s 5G + d SL, s que,in + d SL proc. \widetilde{d}_{s}^{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}=\sum_{\varepsilon\subset\mathcal{E}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}}\left(d_{\varepsilon,s}^{\text{tran}}\hskip-1.42271pt+D_{\varepsilon}^{\text{prop}}\right)+d_{s}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}+d_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},s}^{\text{que,in}}+d_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}^{\text{proc}}\hskip-1.42271pt. (5) In this work, we rely on empirical delay measurements for our analysis. Therefore, our model has to consider the synchronization error that inherently affects the delay measurement between separate TSN nodes, i.e., Δ i, j \Delta_{i,j}, ∀ i, j ∈ ℐ TSN \forall i,j\in\mathcal{I^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}}. Hence, the empirical measurement of the packet delay between the MS and the SL output ports, d s emp d_{s}^{\text{emp}}, could be expressed as in Eq. (6), where Δ MS, SL \Delta_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}} refers to the synchronization error between MS and SL. d s emp = d s MS, SL + Δ MS, SL. d_{s}^{\text{emp}}=d_{s}^{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}+\Delta_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}. (6) The value of Δ MS, SL \Delta_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}} is assumed to take positive or negative values, as clocks may be ahead or behind each other at any instant. A higher | Δ MS, SL | |\Delta_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}| may cause the measurements to become unreliable, as it distorts the temporal correspondence between events. In this way, the E2E latency from Eq. (2) is also affected by the synchronization error. Thus, its empirical measurements can be written as d s E2Emp d_{s}^{\text{E2Emp}} in Eq. (7). d s E2Emp = d MS, s que,in + d MS proc + d MS, s que,out + d s emp. d_{s}^{\text{E2Emp}}=d_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},s}^{\text{que,in}}+d_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}}}^{\text{proc}}+d_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},s}^{\text{que,out}}+d_{s}^{\text{emp}}. (7) Similarly, the empirical measurement of the packet delay between the MS output port and the SL switch processing, from now on Zero-Wait-at-SL (ZWSL) empirical delay, d ~ s emp \widetilde{d}_{s}^{\text{emp}}, could be expressed as in Eq. (8). d ~ s emp = d ~ s MS, SL + Δ MS, SL. \widetilde{d}_{s}^{\text{emp}}=\widetilde{d}_{s}^{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}+\Delta_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}. (8) Observation –. The 5G system delay, d s 5G d_{s}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}, is significantly larger than the transmission delays over wired links, d ε i, j, s tran d_{\varepsilon_{i,j},s}^{\text{tran}}, ∀ ε i, j ∈ ℰ \forall\varepsilon_{i,j}\in\mathcal{E} \ { ε gNB, UE } \{\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{gNB}{{{}}gNB},\lx@glossaries@gls@link{acronym}{UE}{{{}}UE}}}\}, ∀ i, j ∈ ℐ \forall i,j\in\mathcal{I}; the propagation delays, D ε i, j prop D_{\varepsilon_{i,j}}^{\text{prop}}, ∀ ε i, j ∈ ℰ \forall\varepsilon_{i,j}\in\mathcal{E}, ∀ i, j ∈ ℐ \forall i,j\in\mathcal{I}; and processing delays in the TSN switches, d i, s proc, ∀ i ∈ ℐ TSN d_{i,s}^{\text{proc}},\forall i\in\mathcal{I^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}}. On the one hand, transmission delays over wired links are typically within the microsecond range. For example, a 200 Bytes packet, assuming 42 Bytes of overhead, has a transmission delay of 1.9 μ \mu s in 1 Gbps links. Similarly, processing delays in TSN switches are typically also in the microsecond range [ 24 ]. On the other hand, 5G system delay is in the range from milliseconds to a few tens of milliseconds [ 11 ]. This delay and jitter dominance will be corroborated experimentally in Section VI.

As a consequence of this observation, the 5G system delay, and its associated jitter, play a prominent role in Eq. (4)-(8), and therefore in the TAS configuration of the TSN switches. Since our analysis targets the DC flow, the formulation presented from this point onward assumes s = DC s=\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}.

The transmission window duration W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} for flow DC ∈ 𝒮 \text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}\in\mathcal{S} at TSN switch i ∈ ℐ TSN i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} must satisfy two conditions: it must be strictly shorter than the network cycle T i nc T_{i}^{\text{nc}} and equal or greater than the cumulative transmission time of N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets through the output port. These constraints are formalized in Eq. (9), where j ∈ ℐ j\in\mathcal{I} is the next network node after switch i i. N DC ⋅ d ε i, j, DC tran ≤ W i, DC < T i nc. N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\cdot d_{\varepsilon_{i,j},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{tran}}\;\leq W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}<T_{i}^{\text{nc}}. (9) Violating these bounds can lead to performance degradation. If W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is too short, not all N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets can be transmitted within a single network cycle. The remaining packets accumulate and are deferred to subsequent network cycles, introducing additional delays that are multiples of T i nc T_{i}^{\text{nc}}. On the other hand, if W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} exceeds the network cycle duration, it monopolizes the schedule, preventing other flows s ∈ 𝒮 ∖ { DC } s\in\mathcal{S}\setminus\{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}\} from being scheduled during that network cycle.

We consider identical TAS scheduling configurations at both MS and SL switches, i.e., T MS nc = T SL nc T_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}}}^{\text{nc}}=T_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}}}^{\text{nc}} and W MS, DC = W SL, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=W_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Under this assumption, let us define the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} as the time difference between the start of the network cycle at the MS and SL. This offset must be configured to ensure all N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets, generated within a single application cycle, arrive at the output queue of the SL and are transmitted through its egress port before the corresponding transmission window closes.

Since all N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets are sent as a burst from the MS into the 5G system, it is essential to characterize the delay experienced by these packets in the 5G system to establish a value for the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Assuming that the 5G system capacity is generally lower than the capacity of a wired link [ 11 ], the 5G segment constitutes a bottleneck in the 5G - TSN network, where packets experience increasing queuing delays. The first packet in the burst, if no retransmission is required, may traverse the 5G network with minimal delay, i.e., min ⁡ (d DC 5G) \min(d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}), while each subsequent packet must wait for the transmission of the previous packets. Consequently, delay accumulates across the burst, such that the last packet tends to experience the highest latency, i.e., max ⁡ (d DC 5G) \max(d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{\lx@glossaries@gls@link{acronym}{5G}{{{}}5G}}}), which already includes the cumulative queuing delay of the entire burst. Consequently, the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} must be set to at least max ​ (d ~ DC emp) \text{max}(\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}) to guarantee the availability of packets at the SL output port queue to be transmitted on time. This leads to the condition in Eq. (10). δ DC ≥ max ​ (d ~ DC emp). \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\text{max}(\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}). (10) Since d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} is random by nature, it is necessary to characterize its behavior statistically. In this work, we define a statistical upper bound based on a given percentile p ∈ [ 0, 1) p\in[0,1) of the CDF F d ~ DC emp ​ (⋅) F_{\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}}(\cdot) of the ZWSL empirical delay. Specifically, we denote this bound as D ^ DC, p emp = F d ~ DC emp − 1 ​ (p) \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},p}^{\text{emp}}=F_{\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}}^{-1}(p), which corresponds to the p ​ -th p\text{-th} percentile of the delay distribution. A higher value of p p increases the confidence d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} will remain below D ^ DC, p emp \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},p}^{\text{emp}} [ 25 ]. For instance, setting p = 0.999 p=0.999 yields an upper bound such that 99.9% of packets experience delays below this value. Accordingly, we set the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} as in Eq. (11), ensuring that at least p ⋅ 100 p\cdot 100 % of packets have been queued before the transmission window in the SL closes. δ DC ≥ D ^ DC,p emp. \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC},p}}^{\text{emp}}. (11) An additional parameter of interest is the time instant at which an initial transmission window opens at the SL for transmitting packets of the DC flow. We denote this instant as the network cycle offset δ DC ′ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}, formally defined as follows: δ DC ′ = { δ DC, if ​ δ DC < T i nc. δ DC mod T i nc, otherwise. \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}=\begin{cases}\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},&\text{if }\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}<T_{i}^{\text{nc}}.\\ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\bmod T_{i}^{\text{nc}},&\text{otherwise}.\end{cases} (12) The network cycle offset δ DC ′ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime} depends on the configured offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} and the network cycle duration T i nc T_{i}^{\text{nc}}. When δ DC < T i nc \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~<~T_{i}^{\text{nc}}, it holds that δ DC ′ = δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}~=~\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, and the transmission window opens exactly at the configured offset. Conversely, if δ DC ≥ T i nc \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~\geq~T_{i}^{\text{nc}}, the initial transmission opportunity may occur before the configured offset, and the effective opening time is given by δ DC ′ = δ DC mod T i nc ∈ [ 0, T i nc) \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}=\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\bmod T_{i}^{\text{nc}}\in[0,T_{i}^{\text{nc}}).

We consider deterministic transmission as the scenario in which the entire burst of N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets in the same transmission window of a given network cycle at the MS are delivered and forwarded within a single transmission window at the SL switch. In this case, the E2E jitter remains bounded by the window size W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, thus enabling predictable communication.

To determine if a deterministic transmission is possible, it is essential to examine the relationship between the 5G -induced delay and jitter and the following TAS parameters: (i) the network cycle offset δ DC ′ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}, (ii) the network cycle duration T i nc T_{i}^{\text{nc}}, and (iii) the size of the transmission window W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}.

Let us define the uncertainty interval t DC uni t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}} as the range of possible delays a packet from DC flow may experience when traversing the 5G - TSN network: t DC uni = [ min ⁡ (d ~ DC emp), D ^ DC, p emp ]. t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}=\left[\min(\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}),\ \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},p}^{\text{emp}}\right]. (13) This interval is bounded by the minimum and maximum values of the per-packet d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}. Note that we consider the p ​ -th p\text{-th} percentile of the ZWSL empirical delay distribution as the maximum value of the uncertainty interval. Accordingly, we define the induced jitter of the 5G - TSN network, t DC jit t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}, as the difference between the limits of the uncertainty interval: t DC jit = max ⁡ (t DC uni) − min ⁡ (t DC uni). t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}=\max(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})-\min(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}). (14) To guarantee a deterministic transmission, two timing conditions must be satisfied between MS and SL:

First Condition for Determinism: To ensure this one-to-one correspondence between the transmission windows at MS and SL, the start time of the transmission window at the SL switch, i.e., δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, must satisfy the two boundary conditions valid for any network cycle in Eq. (15) or, alternatively, those in Eq. (16). C1: ​ max ⁡ (t DC uni) ≤ δ DC ′, C2: ​ δ DC ′ + W i, DC ≤ min ⁡ (t DC uni) + T i nc. \begin{split}&\text{C1: }\max\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)\leq\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},\\ &\text{C2: }\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\leq\min\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)+T_{i}^{\text{nc}}.\end{split} (15) The condition C1 indicates that the transmission window at the SL switch must start only after the last packet of the burst transmitted by the MS switch has arrived in the current network cycle, ensuring that all those packets are already available when the window opens. The condition C2 requires that the transmission window must close before the first packet served in a subsequent network cycle at the MS switch arrives at the SL switch in the next network cycle. C3: ​ max ⁡ (t DC uni) ≤ δ DC ′ + T i nc, C4: ​ δ DC ′ + W i, DC ≤ min ⁡ (t DC uni). \begin{split}&\text{C3: }\max\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)\leq\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+T_{i}^{\text{nc}},\\ &\text{C4: }\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\leq\min\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right).\end{split} (16) The condition C3 stipulates that the transmission window at the SL switch can start only after the last packet of the burst transmitted by the MS switch has arrived in the previous network cycle. The condition C4 designates that the transmission window must close before the first packet served in a subsequent network cycle at the MS switch arrives at the SL switch in the current network cycle.

Either Eq. (15) or Eq. (16) ensures that all N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets can be forwarded within a single transmission window. Otherwise, the burst will necessarily be split across multiple transmission windows, violating the determinism requirement. We call this effect Inter-Cycle Interference (ICI), where the packets scheduled in a network cycle may interfere with the ones scheduled in the next network cycle.

As max ⁡ (t DC uni) = D ^ DC, p emp \max\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)=\ \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},p}^{\text{emp}}, in Eq. (15) and Eq. (16) the transmission window forwarding all N DC N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} packets at the SL switch is lower bounded by the p ​ -th p\text{-th} percentile of the delay distribution of the ZWSL empirical delay, d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}, and hence by the p ​ -th p\text{-th} percentile of 5G system delay distribution. As a relevant consequence, the packet empirical delay d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} may increase in exchange for achieving deterministic transmission according to the p ​ -th p\text{-th} percentile and the network cycle duration.

Second Condition for Determinism: Directly comparing the upper and lower bounds for δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} isolated on one side of each of the inequalities, either in Eq. (15) or Eq. (16), leads to the additional condition in Eq. (17), which relates how the TAS parameters must be configured with respect to the 5G jitter to guarantee deterministic transmission. T i nc − W i, DC ≥ t DC jit. T_{i}^{\text{nc}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}. (17)

Eq. (17) imposes a second fundamental condition on the interplay between the TAS configuration and the statistical behavior of the 5G system. It establishes that the 5G -induced jitter imposes a lower bound on the network cycle T i nc T_{i}^{\text{nc}}. Additionally, increasing the transmission window W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} not only requires larger network cycle T i nc T_{i}^{\text{nc}} as Eq. (17) shows, but it will also indirectly increase t DC jit t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}} due to the cumulative queuing effect on packets in the 5G system. Furthermore, Eq. (17) also imposes a limit on the link utilization for DC traffic, as additional transmission windows of DC traffic in the network cycle period would cause ICI and break the determinism.

The conditions derived above provide a foundation for deterministic transmission. In the following subsection, we perform a detailed analysis of these conditions under different parameter configurations, identifying scenarios in which determinism is either achieved or violated to later be experimentally demonstrated in Section VI.

The analysis of the impact of the empirical delay d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}, largely dominated by the 5G system, on the coordinated operation of TAS mechanism in both the MS and SL switches is illustrated in Fig. 4, which shows the timing of data transmissions through the egress ports of the MS and SL switches interconnected via a 5G system. Each timeline is structured into consecutive network cycles, each of which contains a single transmission window allocated to the DC flow. The figure considers four distinct scenarios based on the relative timing between the transmission windows at the SL and the uncertainty interval t DC uni t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}} in Eq. (13). These scenarios are defined by specific conditions on the network parameters T i nc T_{i}^{\text{nc}}, W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, and the configured offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, which implicitly determines δ DC ′ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime} according to Eq. (12).

Scenario 1: Deterministic transmission with early arrival. min ⁡ (t DC uni) + T i nc − W i, DC ≥ δ DC ′ ≥ max ⁡ (t DC uni). \min(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})+T_{i}^{\text{nc}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\max(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}). (18) From the previous conditions C1 and C2 in Eq. (15), the lower bound δ DC ′ ≥ max ⁡ (t DC uni) \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\max\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right), and the upper bound, δ DC ′ ≤ min ⁡ (t DC uni) + T i nc − W i, DC \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\leq\min\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)+T_{i}^{\text{nc}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, can be yielded for δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} in Eq. (18). With this, all packets from a given network cycle arrive at the SL before the initial transmission window opens. As a result, they can be transmitted entirely within that transmission window. This configuration ensures deterministic behavior in the 5G - TSN network, with packet jitter bounded by the duration of the transmission window, W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}.

Scenario 2: Deterministic transmission with unused initial transmission window. min ⁡ (t DC uni) − W i, DC ≥ δ DC ′ ≥ max ⁡ (t DC uni) − T i nc. \begin{split}\min(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\max(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})-T_{i}^{\text{nc}}.\end{split} (19) Now, from conditions C3 and C4 in Eq. (16), the lower bound δ DC ′ ≥ max ⁡ (t DC uni) − T i nc \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\max\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)-T_{i}^{\text{nc}}, and the upper bound, δ DC ′ ≤ min ⁡ (t DC uni) − W i, DC \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\leq\min\left(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right)-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, can be yielded for δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} in Eq. (19). No packets arrive before the initial transmission window at SL closes, which therefore remains unused. However, all packets are available before the second transmission window opens, allowing their complete transmission. This results in higher minimum and maximum packet transmission delays compared to Scenario 1, increased by the waiting in the queue until the next network cycle. Nevertheless, the transmission remains deterministic, with bounded jitter.

Scenario 3: Non-deterministic transmission with partial packet arrival. max ⁡ (t DC uni) ≥ δ DC ′ ≥ min ⁡ (t DC uni) − W i, DC. \max(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})\geq\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\geq\min(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. (20) Some packets arrive in time to be transmitted during the initial transmission window at the SL, while others must wait for the second transmission window. This results in ICI, as defined in Section IV-D. Consequently, jitter increases to at least one full network cycle, thereby affecting packets scheduled in the next network cycle, and determinism is lost in the 5G - TSN network.

Scenario 4: Non-deterministic transmission with delayed arrival. δ DC ′ ≤ min ⁡ { min ⁡ (t DC uni) − W i, DC, max ⁡ (t DC uni) − T i nc }. \begin{split}\delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\leq\min\left\{\min(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},\right.\left.\max(t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}})-T_{i}^{\text{nc}}\right\}.\end{split} (21) This configuration represents the most adverse condition for the 5G - TSN network because Eq. (17) is not met. This means ICI is unavoidable. In this case, the second or subsequent transmission windows at SL may close before all packets have arrived, so some packets may be transmitted in the next network cycle, leading to the highest delays and jitter among all scenarios. We reflect the case where ICI is extended to a third transmission window due to the accumulation of packets at the SL ’s buffer between network cycles.

In this section, we describe the implemented 5G - TSN testbed and the considered experimental setup.

To carry out our empirical analysis, we implemented the testbed depicted in Fig. 5. Its components are described below.

5G System. The 5G network comprises a single gNB and a 5G core, both implemented on a PC with a 50 MHz PCIe Amarisoft Software Defined Radio (SDR) cards and an AMARI NW 600 license. The gNB operates in the n78 band with 30 kHz subcarrier spacing and a bandwidth of 50 MHz. Data transmission uses a Time Division Duplex (TDD) scheme with a pattern of four consecutive downlink slots, four uplink slots, and two flexible slots. Although our analysis focuses solely on downlink traffic, this configuration reserves resources for uplink, enabling a realistic testbed environment [ 26 ]. Two UEs are deployed, each consisting of a Quectel RM500Q-GL modem connected via USB to an Intel NUC 10 (i7-10710U, 16 GB RAM, 512 GB SSD) running Ubuntu 22.04. Experiments are conducted using one LABIFIX Faraday cage, with gNB antennas connected to the SDR via SMA connectors. Finally, although it is common to assign one DS-TT per UE [ 5 ], this proof of concept simplifies the setup by using a single DS-TT for both UEs. Similarly, we use a single NW-TT for simplicity’s sake.

TSN Network. The TSN network is built using Safran’s WR-Z16 switches. One switch operates as the MS, another as the SL, and two additional switches act as TSN translators, i.e., NW-TT and DS-TT. The MS is directly connected to a Safran SecureSync 2400 server, which provides the GM clock to the SL for time synchronization. Since the 5G system operates in PTP TC mode (implemented in TSN translators [ 20 ]), an auxiliary WR-Z16 switch, also synchronized via a second SecureSync 2400, is used to distribute the 5G GM clock between the TSN translators. Each WR-Z16 switch is based on a Xilinx Zynq-7000 FPGA and a 1 GHz dual-core ARM Cortex-A9, enabling high switching rates and low processing delays under a Linux-based OS. The switches support IEEE 802.1Qbv TAS and VLANs, and include sixteen 1GbE Small Form-factor Pluggable (SFP) timing ports configurable as PTP MS or SL. Each egress port provides four priority hardware queues to separate the different traffic flows, with a maximum buffer size of 6.6 kB per queue. This limits the number of PCPs from 0 to 3, and also imposes a constraint on sustained throughput, as exceeding the draining capacity leads to packet drops. Additionally, timestamping probes on each port enables high-precision latency measurements between the output ports of the TSN nodes.

Testbed Clock Synchronization. Time synchronization between the TSN GM clock server and the MS is established via coaxial cables carrying two signals: a Pulse Per Second (PPS) pulse for absolute phase alignment and a 10 MHz reference for frequency synchronization through oscillator disciplining. Similarly, the auxiliary WR-Z16 switch is synchronized with the 5G GM clock server using the same coaxial interface, enabling accurate time distribution between the NW-TT and DS-TT to enable the TC mode [ 20 ]. In the testbed, the MS and SL communicate PTP packets over IPv4 using unicast User Datagram Protocol (UDP) and the E2E delay measurement mechanism. The PTP transmission rate is configured to 1 packet per second.

End Devices and Testbed Connections. Two Ubuntu 22.04 LTS servers operate as packet generator with packETH tool and sink, respectively. All components in the testbed are interconnected using 1 Gbps optical fiber links, except for the connections between the NW-TT - gNB, and DS-TT - UEs, which use 1 Gbps RJ-45 Ethernet cables.

Network Traffic. At the 5G core network, two distinct Data Network Names (DNNs) are configured to create separate network slices for industrial traffic management. One carries both PTP and DC flows, while the other handles BE flow, enabling differentiated routing and resource allocation. The 5G network employs IP transport because the considered UE operates without Ethernet-based sessions. To support Layer 2 industrial automation traffic over IP, a Virtual Extensible LAN (VxLAN) -based tunneling mechanism is implemented [ 9 ], with two VxLANs configured accordingly: one transporting DC and PTP flows, and the other BE flow. Packets are tagged with PCP values reflecting the relative priority among the flows: PCP 3 for packets of the PTP flow, PCP 2 for DC flow packets, and PCP 0 for BE flow packets. Additionally, within the 5G network, 5QI values are assigned per flow’s packets, with 80 for PTP and DC traffic, and 9 for BE traffic.

We evaluate the packet transmission delay d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} for the DC flow across five experimental scenarios. Each scenario analyzes a specific TAS configuration parameter to evaluate its effect on the TSN system’s ability to tolerate 5G -induced delay.

Experiment 1: Delay Analysis of 5G Network. We analyze the effect of varying the traffic generation rate R DC gen R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}} on the delay and jitter of the 5G network to determine D ^ DC, p emp \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},p}^{\text{emp}} and, with it, the uncertainty interval t DC uni t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}. For that, we sweep R DC gen R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}} in 300 kbps increments from 350 kbps to 1.55 Mbps. For each R DC gen R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}}, the transmission window W MS, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is calculated based on the lower bound defined in Eq. (9), ensuring compliance with the WR-Z16’s buffer size limitation. This results in transmission windows at MS ranging from 10.5 μ \mu s to 46.5 μ \mu s. TAS is enabled at the MS, while at SL the output queue gate remains open 100% of the time. This is done this way to estimate the ZWSL empirical delay, d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}. The network cycle is fixed at T MS nc = 30 T_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}}}^{\text{nc}}=30 ms.

Experiment 2: Delay Analysis based on Offset between transmission windows of MS and SL Switches. We analyze the effect on d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} of different temporal shifts between network cycles at MS and SL. TAS is similarly configured at both switches, with fixed transmission window W i, DC = 46.5 ​ μ W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=46.5~\mu s and network cycle T i nc = 30 T_{i}^{\text{nc}}=30 ms, ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}. We sweep offset δ DC = { 5, 10, 15, 20, 25, 30 } \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=\{5,10,15,20,25,30\} ms.

Experiment 3: Delay Analysis Based on Network Cycle. We study the influence of the network cycle on d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} with a constant δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} to analyze the scenarios described in Section IV-E. The network cycle is varied in the range of T i nc = { 6, 8, 10, 12.5, 15, 17.5, 20, 22.5 } T_{i}^{\text{nc}}=\{6,8,10,12.5,15,17.5,20,22.5\} ms ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}. Transmission windows are set to W i, DC = { 9, 12, 15, 18, 22.5, 25.5, 30, 33 } W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~=~\{9,12,15,18,22.5,25.5,30,33\} μ \mu s, ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, respectively, to keep the injected data rate into the 5G - TSN network constant at 1.55 Mbps.

Experiment 4: Delay Analysis considering Multiple Traffic flows with Same-Priority. We evaluate the packet transmission delay when multiple distinct flows share the same priority output queue. Firstly, TAS is enabled exclusively at the MS, while at the SL, the output queue gate remains open 100% of the time, as in Experiment 1 to obtain d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}. The network cycle is fixed at T i nc = 30 ​ ms T_{i}^{\text{nc}}=30~\text{ms} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} and, to accommodate all the flows, transmission windows are set to W MS, DC = { 0.25, 0.5, 0.75, 1, 1.25, 1.5, 1.75 } W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=\{0.25,0.5,0.75,1,1.25,1.5,1.75\} ms, forwarding from 1 to 7 aggregated DC flows at source each and analyzing the delay distribution for one of them. Then, we also configure TAS at SL so that W MS, DC = W SL, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=W_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} to characterize d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}. The offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is constant according to previous experiments.

Experiment 5: Delay Analysis Based on BE Traffic Load. We sweep the BE packet generation rates R BE gen = R_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}^{\text{gen}}= {600, 650, 700, 750, 800, 850, 900, 950, 980} Mbps to analyze how the BE load affects the DC traffic d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} distribution. The network cycle is fixed to T i nc = 30 ​ ms T_{i}^{\text{nc}}=30~\text{ms} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} and the transmission window is set only at MS, with W MS, DC = W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}= 46.5 μ \mu s.

Note the T i nc T_{i}^{\text{nc}} values, unlike the Cyclic-Synchronous applications in [ 5 ], have been adapted to the capabilities of our 5G - TSN experimental setup and, with it, the flow constraints to potentially avoid ICI at first and thus allow observable delay variation across experiments. The purpose of this work is not to replicate an exact industrial configuration but to analyze the interaction between 5G delay and jitter and TAS under a synchronized 5G - TSN network.

Additionally, each run of the experiments has been executed for 33 minutes, discarding the samples captured during the first 3 minutes to ensure stable synchronization between TSN devices after clock locking. This time interval allows us to capture an average of 340,000 valid samples for a single DC flow.

In our experiments, the following configurations have been applied to the testbed.

Traffic Generation and Configuration. Focusing on each traffic flow type:

• DC flow: In Experiments 1-3 and 5, we use a single instance of packETH to generate a DC flow with packet size fixed at L DC = 200 L_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=200 Bytes. Despite T i nc T_{i}^{\text{nc}} being in the order of tens of milliseconds, DC packets are generated every 750 μ \mu s to prevent the queue at MS from emptying and therefore emulate a burst of packets within the same transmission window. Then, R DC gen ∝ W i, DC R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}}\propto W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Our work focuses on TAS configurations so that DC flow has no particular application period, but is imposed by the opening of the queue at MS, thus T DC app = T i nc T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}=T_{i}^{\text{nc}}. In Experiment 4, we use multiple instances of packETH to generate multiple DC traffic flows, each with the same PCP value but different destination addresses for the disaggregation at SL to different output ports, measuring d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} for just the target DC flow. In this experiment, the packet size has been reduced to 100 Bytes and the generation rate of the target DC flow’s packets is lessened to one packet every 100 ​ μ ​ s 100~\mu s, while the background DC is set to packETH ’s maximum bitrate for interlacing. • BE flow: The packet size is fixed at L BE = 1500 L_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}=1500 Bytes and generated at a constant rate of 30 Mbps for the Experiments 1-3. Experiment 4 has no BE traffic to avoid interference with DC traffic while Experiment 5 sweeps this rate from 600 Mbps to 980 Mbps.

DC flow: In Experiments 1-3 and 5, we use a single instance of packETH to generate a DC flow with packet size fixed at L DC = 200 L_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=200 Bytes. Despite T i nc T_{i}^{\text{nc}} being in the order of tens of milliseconds, DC packets are generated every 750 μ \mu s to prevent the queue at MS from emptying and therefore emulate a burst of packets within the same transmission window. Then, R DC gen ∝ W i, DC R_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{gen}}\propto W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Our work focuses on TAS configurations so that DC flow has no particular application period, but is imposed by the opening of the queue at MS, thus T DC app = T i nc T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}=T_{i}^{\text{nc}}. In Experiment 4, we use multiple instances of packETH to generate multiple DC traffic flows, each with the same PCP value but different destination addresses for the disaggregation at SL to different output ports, measuring d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} for just the target DC flow. In this experiment, the packet size has been reduced to 100 Bytes and the generation rate of the target DC flow’s packets is lessened to one packet every 100 ​ μ ​ s 100~\mu s, while the background DC is set to packETH ’s maximum bitrate for interlacing.

BE flow: The packet size is fixed at L BE = 1500 L_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}=1500 Bytes and generated at a constant rate of 30 Mbps for the Experiments 1-3. Experiment 4 has no BE traffic to avoid interference with DC traffic while Experiment 5 sweeps this rate from 600 Mbps to 980 Mbps.

TAS scheduling. We consider a single transmission window W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} reserved for DC traffic. The transmission window W i, BE W_{i,\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}} for BE traffic is obtained by subtracting the DC transmission window W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, the fixed 6.26 μ \mu s guard band T GB T^{\text{GB}} that precedes it, and the 160 ns W i, PTP W_{i,\text{\lx@glossaries@gls@link{acronym}{PTP}{{{}}PTP}}} reserved for a single PTP message, from the total network cycle duration, T i nc T_{i}^{\text{nc}}.

Delay Measurement. The empirical delay d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} and the ZWSL empirical delay d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} are measured at the output ports of the TSN switches MS and SL, as shown in Fig. 5 (green dots). Packet transmission delay is measured using WR-Z16 timestamp probes placed at the output ports of the TSN switches MS and SL. These probes extract the sequence number, which is embedded in the first 4 Bytes of the UDP payload, and log the departure timestamp to CSV files. Per-packet latency is calculated by matching sequence numbers from both switches and computing the timestamp difference. The proposed configuration achieves negligible packet loss.

Data Capture. All experiments were run for at least 30 minutes as described in Section V-B, generating a sufficient number of samples to ensure statistically valid results. All datasets and scripts are made publicly available to foster reproducibility 1 1 1 The repository is publicly accessible at this link..

A summary of these experiments and their configurations can be found in Table II.

In this section, we analyze the results of the performed experiments according to the equipment and the scenarios raised within the previous Section V.

Prior to TAS -based experiments, we conducted an empirical comparison of latency and jitter between a standalone TSN network and its integration with 5G for a windowed DC flow. The size of the DC flow packets is 200 Bytes, and the TAS configuration used in both scenarios is W MS, DC = 46.5 W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~=~46.5 μ \mu s and T MS nc = T_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}}}^{\text{nc}}= 30 ms. While for TSN we obtained that max ⁡ { d ~ DC emp } = 40.53 \max\{\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}\}=~40.53 μ \mu s and t DC jit = 29.54 t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}=~29.54 μ \mu s (p = p= 1), in the 5G - TSN setup both rose to max ⁡ { d ~ DC emp } = 18.41 \max\{\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}\}=~18.41 ms and t DC jit = 10.5 t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}=~10.5 ms (p = p= 0.999). These results corroborate the observation in Section IV-A and make the characterization of d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} a key input to the wireless-aware TAS scheduling.

The resulting CDFs of the ZWSL empirical delay distribution, F d ~ DC emp ​ (⋅) F_{\widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}}(\cdot), for the different transmission window sizes W MS, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} are presented in Fig. 6. The results show that increasing W MS, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} causes a moderate rightward shift in the CDF, indicating higher d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}. This is because a larger transmission window in the MS allows more packets to be injected into the 5G system during each network cycle. As more packets enter the 5G system, they accumulate in the buffer before transmission over the radio interface, leading to increased queuing delays and consequently higher d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}, as stated in Section IV-C.

For the evaluated transmission windows, the distributions of d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} show average delays between 6.39 ms and 7.21 ms, with a maximum observed delay of max ⁡ { t DC uni } = 18.41 \max\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\}~=~18.41 ms. The 99.9th percentile is just below 15 ms, so we set the upper bound for the 5G delay contribution as D ^ DC, 0.999 emp = 15 ​ ms \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}}=~15~\text{ms}. The observed minimum delay is min ⁡ { t DC uni } = 4.5 \min\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\}=4.5 ms. With this, the necessary condition for deterministic transmission in Eq. (17) is satisfied: T MS nc − W MS, DC ≈ 30 T_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}}}^{\text{nc}}-W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\approx 30 ms > t DC jit = 10.5 >t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}=10.5 ms. These results are aligned with the latency results in [ 11 ] and bounds are considered in subsequent experiments.

Despite these results, it is important to note that the obtained 99.9th percentile of the delay, D ^ DC, 0.999 emp \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}}, is not universal, as it depends on multiple factors such as the 5G configuration, the Signal-to-Interference-plus-Noise Ratio (SINR), the traffic load, etc. It must be estimated for any particular scenario and conditions where the 5G system is deployed. For example, the influence of the load is studied in the Experiments 4, 5.

Fig. 7 uses a grouped bar chart representation. Each evaluated scenario corresponds to a specific offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, and the plot represents the set of transmission windows in the SL switch as one or more bars, one per the n n -th transmission window used for transmitting an arbitrary packet in that scenario. The x-axis enumerates the evaluated scenarios, while the y-axis shows the minimum packet-transmission empirical delay d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} conditioned on the packet being transmitted in the n n -th transmission window. Furthermore, each bar is labeled with the probability that this case occurs. Note that the sum of the probabilities of all bars within the same evaluated scenario equals one, since they collectively cover all possible transmission outcomes for a specific offset configuration.

Assuming that the necessary condition for achieving a deterministic transmission in Eq. (17) is met, as seen in Experiment 1, the next fundamental constraint to be satisfied is the boundary conditions in Eq. (15) or, alternatively, in Eq. (16). With this, the configured offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} must be at least the 99th percentile of the ZWSL empirical delay distribution that defines the upper bound of the uncertainty interval, this is D ^ DC, 0.999 emp = max ⁡ { t DC uni } \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}}=\max\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\}. For network cycle offset δ DC ′ = δ DC > D ^ DC, 0.999 emp \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}=\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}>\hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}} (i.e., greater than 15 ms), 100% of packets are transmitted within a single transmission window, as evidenced by a single bar per case. These realizations correspond to the Scenario 1 depicted in Fig. 4. This indicates d DC emp ∈ [ δ DC − W i, DC, δ DC + W i, DC ] d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}\in[\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},\ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}] ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} since δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} exceeds D ^ DC, 0.999 emp \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}} and thus δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is statistically greater than the maximum delay of the 5G network, satisfying Eq. (10). As W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is scaled accordingly (see Section V-C), d DC emp = δ DC d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}=\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Additionally, larger offsets δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} thus lead to higher latencies.

When δ DC ′ = δ DC ≤ D ^ DC, 0.999 emp \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}=\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\leq\hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}} (i.e., equal or lower than 15 ms) not all packets arrive in time to be scheduled within the transmission window in the same network cycle at SL and must therefore be deferred to the corresponding transmission window of the next network cycle. These realizations correspond to the Scenario 3 depicted in Fig. 4. The main consequence is that packets transmitted in the second transmission window incur an additional delay approximately equal to T i nc T_{i}^{\text{nc}}. As a result, the empirical delay distribution becomes bimodal, meaning that a subset of packets are transmitted with a delay shifted by T i nc T_{i}^{\text{nc}}, i.e., d DC emp ∈ [ δ DC + T i nc − W i, DC, δ DC + T i nc + W i, DC ] d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}\in[\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+T_{i}^{\text{nc}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+T_{i}^{\text{nc}}+W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}].

The setting of the 99.9th percentile offset obtained from Experiment 1, i.e., δ DC ′ = δ DC = D ^ DC, 0.999 emp = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}=\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~=~{\hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp }}}= 15 ms, is not enough to transmit all packets within the same transmission window due to the ICI effect, increasing then the probability of being transmitted in a second network cycle.

In conclusion, the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} must be elected so that ICI effect does not occur and, at the same time, it is not excessively large to increase latencies, i.e., δ DC = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}= 20 ms. However, as stated in Section IV-D, this higher offset will unevitably increase the latency in exchange of guaranteeing the deterministic transmissions.

Fig. 8 uses the same grouped bar chart representation introduced in the previous experiment. Each evaluated scenario corresponds to a specific combination of the network cycle T i nc T_{i}^{\text{nc}} and the transmission window size W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. The represented realizations correspond to the Scenarios 2-4, illustrated in Fig. 4, where δ DC = 20 \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=20 ms according to previous Experiment 2. Some present severe ICI as packets are transmitted from SL across multiple transmission windows. As the network cycle T i nc T_{i}^{\text{nc}} decreases, the percentage of packets transmitted in the target transmission window also decreases. Consequently, the number of transmission windows where packets of the same burst can be transmitted increases. For clarity, some evaluated network cycles (i.e., T i nc ≥ 20 T_{i}^{\text{nc}}\geq 20 ms, Scenario 1 in Fig. 4) are not depicted in the Fig. 8 due to 100% of generated packets being transmitted within a single transmission window, i.e., with no ICI, as seen in Experiment 2.

On the one hand, most of the cases where T i nc < δ DC T_{i}^{\text{nc}}~<~\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} and T i nc < max ⁡ { t DC uni } T_{i}^{\text{nc}}<\max\left\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right\} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} may see their transmissions split between network cycles. This depends directly on δ DC ′ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}, as described in Eq. (12), e.g., δ DC ′ = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}= {7.5, 5} ms for T i nc = { 12.5, 15 } T_{i}^{\text{nc}}=\{12.5,~15\} ms, respectively, where δ DC ′ > min ⁡ { t DC uni } − W i, DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}~>~\min\left\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right\}~-~W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} (Scenario 3 in Fig. 4). Nevertheless, the compliance with Eq. (17) implies that a δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} correction may solve this ICI and move on to Scenario 1. For the cases where T i nc = T_{i}^{\text{nc}}= {6, 8, 10} ms, the condition of Eq. (17) is not met, i.e., T i nc − W i, DC < t DC jit = 10.5 T_{i}^{\text{nc}}~-~W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~<~t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}=10.5 ms. This means that ICI effect is unavoidable. Moreover, given that δ DC ′ = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}= {2, 4, 0} ms, i.e., δ DC ′ < min ⁡ { t DC uni } − W i, DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}<\min\left\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right\}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, these realizations fall under the Scenario 4 in Fig. 4. It results that minimum latency is equal to δ DC ′ + T i nc \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}+T_{i}^{\text{nc}} as δ DC ′ \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime} is not enough to accomplish the transmission of any packet within the initial transmission window.

On the other hand, when T i nc < δ DC T_{i}^{\text{nc}}<\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} and T i nc > max ⁡ { t DC uni } T_{i}^{\text{nc}}>\max\left\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right\} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, e.g., T i nc = 17.5 T_{i}^{\text{nc}}=17.5 ms, an initial transmission window opens at δ DC ′ = 2.5 \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}=2.5 ms, which is earlier than the transmission window originally scheduled at δ DC = 20 \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=20 ms (Scenario 2 in Fig. 4). While these early transmission windows may theoretically lead to ICI if packets arrive prematurely, no such interference was observed. This is due to min ⁡ { t DC uni } − W i, DC ≥ δ DC ′ \min\left\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\right\}~-~W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~\geq~\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\prime}, preventing any packet from being transmitted from SL before its planned transmission window. As a result, 100% of the packets are transmitted at δ DC = 20 \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=20 ms, consistent with the target scheduling.

To conclude, shorter network cycles T i nc T_{i}^{\text{nc}} may lead to ICI when the Eq. (17) is not met. Furthermore, those packets queued at SL before δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} suffer an empirical delay so that d DC emp < δ DC d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}<\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} and d DC emp > δ DC d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}}>\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. This occurs when the network cycle offset δ DC ′ \delta^{\prime}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is not enough, taking into account the d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} distribution, as stated in Section IV-D. In addition, this produces ICI to the packets scheduled in the preceding and succeeding network cycles, potentially preventing them from meeting their constraints. Then, T i nc ≥ 17.5 T_{i}^{\text{nc}}\geq 17.5 ms. Nevertheless, considering a unique DC flow type, T i nc = T DC app = 30 T_{i}^{\text{nc}}=T_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{app}}=30 ms is kept for the Experiments 4-5.

In this experiment, target and background DC flows share the same transmission window. Two scenarios are carried out: one corresponding to the results shown in Fig. 9(a), where TAS is disabled at the SL, measuring the 5G network delays for target DC traffic; while Fig. 9(b) illustrates the case where TAS is enabled at SL.

Similarly to the results presented in Experiment 1, Fig. 9(a) shows the CDFs of d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} shift rightward as the duration of the transmission window W MS, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} increases. However, W MS, DC W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} is now significantly larger, reaching up to 1.75 ms, in contrast to the few tens of microseconds of Experiment 1. As a consequence, significantly higher values of d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} are observed. Although the minimum delay remains approximately min ⁡ { t DC uni } = 4.5 \min\{t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{uni}}\}=4.5 ms, the average delays range from 10.27 ms to 17.79 ms. Additionally, the maximum observed value of d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} exceeds 23 ms, while the 99.9th percentile in the worst-case configuration is D ^ DC, 0.999 emp = 22 ​ ms \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}}=22~\text{ms}. Consequently, t DC jit = 17.5 t_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{jit}}~=~17.5 ms, which satisfies Eq. (17). These results underline the increased 5G queuing delays and jitter induced by the presence of multiple concurrent DC flows with the same priority in 5G downlink communications.

Fig. 9(b) shows the CCDF corresponding to the scenario where the TAS mechanism is enabled at the SL, where d DC emp d_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} is evaluated with δ DC = 20 \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}=20 ms, resulting from Experiment 2. When W i, DC ∈ [ 0.25, 0.75 ] W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}~\in~\left[0.25,0.75\right] ms ∀ i ∈ ℐ TSN \forall~i~\in~\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, the measured delays are concentrated within the interval [ δ DC − W i, DC, δ DC ] [\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},~\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}] ∀ i ∈ ℐ TSN \forall i\in~\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, for those packets that arrive in time to be scheduled within the transmission window in the same network cycle at the SL. These latency values below δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} happen when a packet at the MS is transmitted at any time within the transmission window W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} and, due to packet disaggregation at the output ports in SL, target DC packets waiting in the queue are quickly transmitted after δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}. Although some measures in W i, DC ∈ [ 0.25, 0.75 ] W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\in\left[0.25,0.75\right] ms ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} are above δ DC = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}= 20 ms, they cannot be attributed to any effect as they are within the amount allowed by the defined 99.9th percentile. Nevertheless, when W i, DC ∈ [ 1, 1.25 ] W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\in\left[1,1.25\right] ms ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}, the measured delays are concentrated within the interval [ δ DC − W i, DC, δ DC + W i, DC ] [\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}-W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}},\delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}] ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}}. This occurs when the packets arrive later than those 20 ms but find their gate open during W SL, DC W_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}, and the probability of this effect increases as the W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} gets higher. This means that W SL, DC > N DC ⋅ d ε MS, NW-TT, DC tran W_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL},\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}>N_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\cdot d_{\varepsilon_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS},\lx@glossaries@gls@link{acronym}{NW-TT}{{{}}NW-TT}}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{tran}} was necessary to guarantee the deterministic transmission of certain target DC packets in exchange of reducing the bandwidth, although some jitter within W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} spreads across subsequent TSN nodes. Furthermore, this effect is highlighted in the cases of larger window sizes W i, DC ∈ [ 1.5, 1.75 ] W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}\in\left[1.5,1.75\right] ms ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} —and then, greater aggregated traffic loads—, where packets start suffering greater latencies than δ DC + W i, DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} and not all packets arrive in time to be transmitted within the same network cycle. Consequently, some packets must be transmitted within the transmission window of the following network cycle, incurring an additional delay of T i nc = 30 T_{i}^{\text{nc}}=30 ms, i.e., δ DC + T i nc = 50 \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}+T_{i}^{\text{nc}}=50 ms. This behavior causes the ICI effect.

In summary, in scenarios where multiple flows share the same priority, the solution for transmitting the packets of the DC flows in a single transmission window is to increase W i, DC W_{i,\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} ∀ i ∈ ℐ TSN \forall i\in\mathcal{I}^{\text{\lx@glossaries@gls@link{acronym}{TSN}{{{}}TSN}}} accordingly. However, this approach inevitably leads to increased jitter, which may become significant and impact the performance of the corresponding industrial application. Thus, in the SL, the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} should be set according to the new percentile D ^ DC, 0.999 emp \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}} measured, as well as the transmission window W SL, DC W_{\text{\lx@glossaries@gls@link{acronym}{SL}{{{}}SL}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} should be resized to optimize bandwidth at the same time jitter is reduced.

The resulting CCDF of d ~ DC emp \widetilde{d}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}^{\text{emp}} is depicted in Fig. 10, where a clear trend towards higher latencies can be seen as BE load is increased. For the cases R BE gen ∈ [ 600, 650 ] R^{\text{gen}}_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}\in[600,650] Mbps, we obtain similar behavior of latencies as in the case of Experiment 1, i.e., D ^ DC, 0.999 emp ≤ \hat{D}_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}},0.999}^{\text{emp}}\leq 15 ms, so that we can also set δ DC = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}= 20 ms, replicating Scenario 1 in Fig. 4. However, despite using the same TAS configuration of Experiment 1 with fixed W MS, DC = W_{\text{\lx@glossaries@gls@link{acronym}{MS}{{{}}MS}},\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}= 46.5 μ \mu s, higher BE loads such as R BE gen ∈ [ 700, 750 ] R^{\text{gen}}_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}\in[700,750] Mbps clearly triggers latencies slightly over δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} such that few packets could not be transmitted until the next network cycle. In those cases, the offset should be rescaled up to, for example, δ DC = \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}}= 25 ms. Similarly, R BE gen = R^{\text{gen}}_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}= 800 Mbps is enough for increasing latencies over 50 ms (Scenario 4 in Fig. 4). Additionally, latencies for R BE gen ∈ [ 850, 980 ] R^{\text{gen}}_{\text{\lx@glossaries@gls@link{acronym}{BE}{{{}}BE}}}\in[850,980] Mbps highly increase up to 800 ms, which is quite far from the industrial constraints. These results highlight the limited isolation between DC and BE traffic in the 5G system. Although T GB T^{\text{GB}} prevents collisions in the TAS domain (Section III-C), the 5G system only provides relative prioritization via the 5QI configuration. Consequently, resources are still shared, and under high BE load, DC packets may experience increased queuing delays due to buffer contention. Hence, the latency and jitter of the DC flow are substantially increased by the BE load, and the offset δ DC \delta_{\text{\lx@glossaries@gls@link{acronym}{DC}{{{}}DC}}} must be reviewed again.

This section reviews existing work on 5G - TSN integration, with a specific focus on TAS scheduling. In the literature, TSN has been explored both as a fronthaul/backhaul solution within a 5G network and in scenarios where the 5G network acts as a TSN bridge. Regarding the latter, we analyze works that address TAS -based integration through architectural frameworks, simulation-based evaluations, and experimental testbeds. Finally, we compare our contributions with respect to the other works in each topic.

Some research efforts concentrate on the 5G fronthaul segment, which involves Ethernet-based low-latency transport solutions. Hisano et al. [ 27 ] propose the gate-shrunk TAS, a dynamic variant of TAS that adjusts gate states via special control packets to enhance bandwidth efficiency without degrading delay for machine-to-machine communications. Nakayama et al. [ 28 ] develop an autonomous TAS scheduling algorithm formulated as a boolean satisfiability problem that uses an FPGA-based solver for fast computation and flexible reconfiguration of the GCL in response to changing traffic. Shibata et al. [ 29 ] propose autonomous TAS techniques, named iTAS and GS-TAS, and adaptive compression for mobile fronthaul to efficiently manage low-latency and bursty IoT traffic, achieving deterministic delay and supporting fronthaul and backhaul in 5G and IoT networks.

Although these studies provide valuable TAS -based solutions for deterministic low-latency fronthaul transport, they are not sufficient to ensure E2E determinism in networks composed of both TSN nodes and 5G, joined as a TSN bridge.

From an architectural perspective, it is well established that the 5G system behaves as a TSN logical switch, as discussed in [ 30 ] [ 31 ]. Several works address time synchronization [ 32 ] and 5G - TSN QoS mapping [ 33 ] as key functions for this logical switch model. Comprehensive surveys and architectural frameworks have laid the foundation for understanding the role of TAS in 5G - TSN networks. Satka et al. [ 34 ] provide an in-depth study that, while covering synchronization, delay, and security in 5G - TSN systems, identifies TAS as a critical yet underexplored component in achieving E2E determinism. Egger et al. [ 25 ] highlight the incompatibilities between TAS ’s deterministic assumptions and the stochastic nature of wireless 5G links, advocating for a new “wireless-aware TSN engineering” paradigm to adapt TAS mechanisms for future 5G and 6th Generation (6G) systems. Islam [ 35 ] applies graph neural networks combined with deep reinforcement learning for incremental joint TAS and radio resource scheduling, illustrating the benefits of AI-driven optimization in complex integrated networks. Nazari et al. [ 36 ] develop the incremental joint scheduling and routing algorithm, emphasizing precise TAS gate control and routing within centralized TSN network configuration to minimize delay and packet delay variation.

While these contributions offer valuable architectural and conceptual perspectives on TAS integration in 5G - TSN networks, they lack empirical validation and do not specifically examine the impact of jitter on network performance.

Several studies have relied on simulation to evaluate and improve TAS scheduling, routing, and performance in 5G - TSN integrated networks. Li et al. [ 37 ] propose a fault-tolerant TAS scheduling algorithm based on redundant scheduling and priority adjustment to reduce complexity and improve robustness against timing faults, offering a scalable baseline for 5G - TSN integration. Wang et al. [ 38 ] propose the Balanced and Urgency First Scheduling (B-UFS) heuristic algorithm to ensure deterministic E2E delay for periodic time-critical flows. It introduces a pseudo-cyclic queuing and forwarding model for uncertain arrivals, a uniform resource metric, and a scheduling strategy that balances urgency and load across time and space to efficiently manage resources across the network. Debnath et al. [ 33 ] present 5G TQ, an open-source framework that enables 5G - TSN integration through a TSN -to- 5G QoS mapping algorithm. It implements a QoS -aware priority scheduler within the 5G MAC layer and evaluates Radio Access Network (RAN) -level scheduling strategies using ns-3, demonstrating improvements in delay and reliability for industrial traffic. Ginthör et al. [ 39 ] propose a constraint programming–based framework for optimizing E2E flow scheduling in 5G - TSN networks by modeling domain-specific constraints and a unified performance objective. Simulations on industrial topologies demonstrate improved schedulability and reduced delay compared to separate 5G and TSN scheduling approaches. Chen et al. [ 40 ] explore the use of 5G as a TSN bridge, integrating TAS to support time-triggered flows across TSN and 5G domains. It proposes a dynamic scheduling mechanism that allocates time slices to critical services, ensuring deterministic delay and jitter. However, the study abstracts away the wireless characteristics of 5G, focusing solely on its role as a deterministic forwarding bridge rather than analyzing radio-layer variability. Shih et al. [ 41 ] propose a TAS scheduling method based on constraint satisfaction that incorporates the variable residence time of the 5G logical bridge to preserve E2E determinism. The approach models wireless timing uncertainty and introduces a robustness margin into the scheduling constraints to balance schedulability and reliability. Fontalvo-Hernández et al. [ 42 ] analyze the feasibility of integrating 5G traffic into TSN schedules governed by TAS, focusing on jitter mitigation at the 5G - TSN boundary. It evaluates the hold-and-forward buffering mechanism proposed in 3GPP standards, which equalizes packet residence time in 5G to make flows compatible with TAS schedules. Using OMNeT++ simulations, the study quantifies the trade-off between jitter reduction and increased E2E delay introduced by buffering.

While these simulation-based studies provide valuable insights into TAS scheduling and jitter mitigation, they lack practical guidelines for configuring TAS to handle 5G delay variability, and do not validate their proposals in real environments. For instance, although the promising approach of the hold-and-forward buffer jitter mitigation mechanism for TAS presented by Fontalvo-Hernández et al. [ 42 ] and the complete 5G - TSN architecture proposed by Debnath et al. [ 33 ], both lack commercial 5G and TSN equipment validation. Our work fills this gap by using a functional testbed to empirically analyze jitter impact and derive robust TAS configurations for 5G - TSN networks.

Experimental validations complement theoretical and simulation results, providing practical insights into TAS scheduling for 5G - TSN networks. Jayabal et al. [ 43 ] design a contention-free Carrier Sense Multiple Access (CSMA) Medium Access Control (MAC) with transmission gating to minimize collisions and achieve low delay in 5G - TSN scenarios. Agustí-Torra et al. [ 44 ] aim to study architectural challenges and interoperability aspects in an emulated 5G - TSN testbed. Aijaz et al. [ 45 ] build a 5G - TSN testbed using commercial TSN and 5G devices to transmit traffic via IEEE 802.1Qbv TAS. It evaluates E2E delay and jitter by scheduling packets over a near product-grade 5G system under varying traffic and network conditions. The analysis offers a useful initial view of the impact of 5G integration on TAS performance and outlines resource allocation strategies, though a more in-depth exploration remains open for future work.

Recently, we investigated in [ 6 ] the impact of 5G network-induced delay and jitter on the performance of IEEE 802.1Qbv scheduling in integrated 5G - TSN networks. This study involved an empirical analysis based on a real-world testbed, which included IEEE 802.1Qbv-enabled switches, TSN translators, and a commercial 5G system. We focused on evaluating how the integration of 5G affects the deterministic behavior of IEEE 802.1Qbv scheduling, developed an experimental setup combining TSN and 5G technologies, and identified key configuration parameters to optimize IEEE 802.1Qbv performance within a 5G - TSN environment. However, neither in this nor in other empirical work are the conditions for deterministic communications defined, nor are the critical scenarios evaluated.

Although these works are characterized by also conducting an empirical testbed-based evaluation of a 5G - TSN network with real traffic, they differ in scope and depth. Agustí-Torra et al. [ 44 ] focus on preliminary design and implementation of the testbed without delving into the evaluation of the feasibility of combining for different TAS configurations. In the case of Aijaz et al. [ 45 ], the enwindowed traffic from a single TSN switch is examined through the 5G system, focusing solely on delay performance rather than assessing a full TAS configuration. Similarly, Jayabal et al. [ 43 ] aim to enhance wireless TSN MAC coordination without integrating or characterizing real 5G latency behavior. In contrast, our work focuses on characterizing this delay for a specific TAS configuration in order to determine the required offset between TSN nodes in the downlink for deterministic operation.

In this work, we have characterized how 5G -induced delay and jitter affect the coordinated operation of IEEE 802.1Qbv TAS in integrated 5G - TSN networks, with the objective of determining the timing conditions required to preserve deterministic transmission. We consider deterministic transmission as the scenario in which all packets of the same application cycle are forwarded within a single transmission window at both TSN switches adjacent to the 5G segment, ensuring bounded jitter not exceeding the transmission window.

To enable deterministic transmission, a temporal offset must be introduced between the network cycles of the TSN switches enclosing the 5G segment, dimensioned from a high-percentile bound of the 5G empirical delay. In addition, four timing constraints must be satisfied to ensure that all packets from the same application cycle are confined within a single transmission window. We also revealed another fundamental condition: the difference between the network cycle duration and the configured transmission window must be strictly larger than the 5G jitter, establishing how TAS parameters must be configured with respect to 5G delay to avoid ICI. These conditions were validated using a commercial 5G - TSN testbed under realistic equipment-induced delay variability. Furthermore, our experiments showed that multiple delay-critical flows sharing the same priority increase 5G queuing delays and jitter, requiring larger offsets and transmission windows to maintain application cycle confinement. The presence of best effort traffic further broadens the 5G delay distribution, even with TAS correctly configured, demonstrating that flow concurrency, traffic load, and 5G queuing dynamics must be explicitly considered to preserve the deterministic transmission.

Our results call for investigating jitter-mitigation techniques, such as the hold-and-forward buffering mechanism, to alleviate the ICI effect and achieve near-full link utilization under realistic 5G delay variability. In addition, the performance of the 5G - TSN network can be further enhanced by leveraging uRLLC -oriented latency reduction features such as configured grants, mini-slot scheduling, 5G network slicing, or upcoming 6G systems. Our findings also motivate the design of adaptive algorithms capable of dynamically adjusting the offset and TAS parameters based on real-time traffic load, empirical 5G delay distribution, and radio channel conditions. Finally, future work could analyze how to guarantee determinism under isochronous traffic.